Project title: Synthesis, Characterization and Device Applications of InSb Nanowire Parallel Arrays for High Mobility Transistors
Device scaling has been the driving force for technology advancements in the semiconductor industry over the last few decades. However, silicon device dimensions cannot be scaled indefinitely and thus there is an urgent need to explore alternative device materials for future electronics. In this regard, due to the unique physical properties like excellent carrier mobility and gate electrostatics, III-V compound semiconductor nanowires (NWs) have attracted significant attention in the area of next generation devices. Notably, high performance indium arsenide (InAs) NW arrays assembled in defined locations with preferable alignment and density on silicon substrates have been demonstrated for gigahertz device operation, which elucidates their potential applications. Fundamental studies on the higher mobility nanowire material indium antimonide (InSb) are still very limited. In this proposal, we will emphasize InSb NWs to understand their fundamental properties and ultimate electrical performance limits. The aim is to achieve high-mobility and low-operating-power NW field-effect transistor parallel arrays through a series of well-designed and systematic experiments ranging from NW synthesis and characterization to device integration studies. Such InSb NW parallel arrays are expected to induce significant impact and potency for future ultrahigh frequency electronics.
Supervisor: Dr Johnny C. Ho (firstname.lastname@example.org)
Suitable for: M.Phil./Ph. D